Job Description

Senior Design Engineer – Analog Signal

Location: Agoura Hills, CA 91301

Hybrid Remote: 3 days in the office per week | Reporting To: Sr. Director, Engineering

Responsibilities:

• Designing and developing new products in a dynamic, R&D organization
• Owning analog designs at the chip and/or block level
• Defining architectures to achieve competitive product specifications
• Designging, simulate, and characterizing high-performance and high-speed circuits
• Creating high-level model design for tradeoff analysis and behavior modeling for verification
• Developing floorplan, working to demonstrate post-extraction performance
• Documenting analysis/simulation to show design achieves critical electrical, timing, and pre-silicon verification flow
• Mentoring junior team members as needed

Requirements:

• 5+ years of professional experience in analog, high-speed circuit design and engineering
• Experience with high-speed PLL circuits is required for this position
• Preference for candidates with experience with transmitter, receiver (CTLE, DFE), DLL, PI, and/or clock distribution circuits
• 2+ years of experience in CMOS analog circuit design, knowledge of bias, op-ramp, LDO
• Experience designing memory interfaces such as DDR4, DDR5, or PCIE
• Experience with Verilog-A, Verilog, or MATLAB is preferred
• Experience with FinFET process and digitally assisted design is preferred

Benefits:

• Competitive medical, dental, vision, and life insurance plans – including HSA and FSA options
• 401K plan with company match
• Employee stock purchase plan (15% discount)
• Charitable gift giving match/plan
• Relocation assistance

Compensation:

• $130K - $180K + Bonus + RSUs

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